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Beschreibung
This book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle. The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches. This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs.
Validation and Verification
Validation and Verification
Details
| Verlag | Springer International Publishing |
| Ersterscheinung | 09. Dezember 2019 |
| Maße | 23.5 cm x 15.5 cm |
| Gewicht | 635 Gramm |
| Format | Hardcover |
| ISBN-13 | 9783030305956 |
| Auflage | 1st ed. 2020 |
| Seiten | 289 |