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Beschreibung
The use of customised soft-core processors in which instructions can be integrated into a system in application hardware is increasing in the Field Programmable Gate Array (FPGA) field. Specifically, the partial run-time reconfiguration of FPGAs in specialised processors for a particular domain can be very beneficial. In this report, the design and implementation for the customisation of a soft-core MIPS processor using an FPGA and partial reconfiguration (PR) of FPGA technology will be addressed to achieve efficient resource use.
Details
| Verlag | LAP LAMBERT Academic Publishing |
| Ersterscheinung | 24. November 2017 |
| Maße | 22 cm x 15 cm x 0.8 cm |
| Gewicht | 179 Gramm |
| Format | Softcover |
| ISBN-13 | 9783330332126 |
| Seiten | 108 |
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