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Beschreibung
While Boolean reasoning techniques have been a central element of two-level circuit theory for many decades Reasoning in Boolean Networks describes a basic reasoning methodology for multi-level circuits. This leads to a unified view on two-level and multi-level logic synthesis. The presented reasoning techniques are applied to various CAD-problems to demonstrate their usefulness for today's industrially relevant problems.
Reasoning in Boolean Networks provides lucid descriptions of basic algorithmic concepts in automatic test pattern generation, logic synthesis and verification and elaborates their intimate relationship to provide further intuition and insight into the subject. Numerous examples are provide for ease in understanding the material.
Reasoning in Boolean Networks is intended for researchers in logic synthesis, VLSI testing and formal verification as well as for integrated circuit designers who want to enhance their understanding of basic CAD methodologies.
Logic Synthesis and Verification Using Testing Techniques
Details
| Verlag | Springer US |
| Ersterscheinung | 07. Dezember 2010 |
| Maße | 24 cm x 16 cm |
| Gewicht | 383 Gramm |
| Format | Softcover |
| ISBN-13 | 9781441951762 |
| Auflage | Softcover reprint of hardcover 1st edition 1997 |
| Seiten | 230 |