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Beschreibung
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
Details
| Verlag | Springer US |
| Ersterscheinung | November 2014 |
| Maße | 23.5 cm x 15.5 cm |
| Gewicht | 470 Gramm |
| Format | Softcover |
| ISBN-13 | 9781489994370 |
| Auflage | 2011 |
| Seiten | 287 |
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