✍️ 🧑‍🦱 💚 Autor:innen verdienen bei uns doppelt. Dank euch haben sie so schon 411.512 € mehr verdient. → Mehr erfahren 💪 📚 🙏

Low Power CMOS Approximate Voting Architecture for Reliable Computing

Low Power CMOS Approximate Voting Architecture for Reliable Computing

von Kalaiselvi Sundaram, Saravanakumar Natarajan und Vijeyakumar Krishnasamy Natarajan
Softcover - 9786139845651
35,90 €
  • Versandkostenfrei
Auf meine Merkliste
  • Hinweis: Print on Demand. Lieferbar in 5 Tagen.
  • Lieferzeit nach Versand: ca. 1-2 Tage
  • inkl. MwSt. & Versandkosten (innerhalb Deutschlands)

Autorenfreundlich Bücher kaufen?!

Beschreibung

Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design.

Details

Verlag LAP LAMBERT Academic Publishing
Ersterscheinung 10. Juni 2018
Maße 22 cm x 15 cm x 0.4 cm
Gewicht 102 Gramm
Format Softcover
ISBN-13 9786139845651
Seiten 56