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Beschreibung
The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.
Details
| Verlag | LAP LAMBERT Academic Publishing |
| Ersterscheinung | 16. Dezember 2012 |
| Maße | 22 cm x 15 cm x 0.7 cm |
| Gewicht | 173 Gramm |
| Format | Softcover |
| ISBN-13 | 9783846546215 |
| Seiten | 104 |
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