Hardware Specification, Verification and Synthesis: Mathematical Aspects

Current research into formal methods for hardware design is presented in the papers in this volume. Because of the complexity of VLSI circuits, assuring design validity before circuits are manufactured is imperative. The goal of research in this area is to develop methods of improving the design process and the quality of the resulting designs. The major trend apparent at the workshop is that researchers are rapidly moving away from post hoc proof techniques with their great expense. A number of papers were presented that dealt with problems of synthesizing correct circuits and of designing with the goal of verification. Researchers are also beginning to deal with the theoretical issues of reasoning about concurrent systems and asynchronous systems, and to introduce new logical tools such as constructive type theory and category theory. Most of the research reported was performed in the United States.