Design and Performance Analysis of VLSI Based FELICS Algorithm

The design and performance analysis of VLSI based Fast Efficient Lossless Image Compression System (FELICS) which involves various methods. The first Block Based Compression Algorithm is used to analyse the images within each pixel before the storage space processes and therefore the size of the memory gets reduced. Second, FPGA kit implementation based on the Set Partitioning in Hierarchical Trees coding algorithm and Discrete Wavelet Transform is used for the compression of images. Third, Satellite communication has been growing for the development of rapid and efficient techniques, for the storage and transmission of satellite images. Finally, the lossless image compression system for VLSI based fast efficient Simplified Adjusted Binary Code and then the Golomb Rice Code algorithm is proposed to present the lossless image compression. The future scope of this module is that the quality of the image can be further improved with high peak signal to noise ratio value using some other compression techniques. This method can be further enhanced by the implementation of Field Programmable Gate Array kit.