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Design & Analysis of Fast Adder using Quaternary Signed Digit (QSD)

Design & Analysis of Fast Adder using Quaternary Signed Digit (QSD)

von Ravi Shankar Mishra
Softcover - 9786139913497
39,90 €
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Beschreibung

Processors with high computational speed are necessary nowadays to solve problems faster and accurately. The speed of the processors depends on the speed of the basic processing unit. To increase the speed of these basic units we need fast adders and subtractors. This book discusses the QSD (Quaternary Sign Digit) adder unit which is faster than any other adders. The main problem of the adder is that the carry propagates from one stage to another increase. This can be reduced by using the QSD adder. It uses the base-four number system in which will help in reducing the number of bits required to store in the memory unit. This adder can be used for high-speed computing processors where the area is not a concern.

Details

Verlag LAP LAMBERT Academic Publishing
Ersterscheinung Oktober 2018
Maße 22 cm x 15 cm x 0.4 cm
Gewicht 96 Gramm
Format Softcover
ISBN-13 9786139913497
Seiten 52