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Beschreibung
As a result of aggressive downscaling, short-channel effects (SCEs) become a major threat for future downscaling especially in the sub-100nm region. In order to extend the International Technology Road-map for Semiconductors (ITRS) road-map beyond 100nm, Double-Gate (DG) MOSFET evinces himself as a major promising candidate due to its higher scaling capability. In this book, modelling using a pseudo- two-dimensional (2D) analysis was presented to explore the effect of scaling especially for subthreshold characteristics of short-channel DG and conventional single gate MOSFET.
Using Pseudo 2d Analysis
Details
| Verlag | LAP LAMBERT Academic Publishing |
| Ersterscheinung | 27. Februar 2014 |
| Maße | 22 cm x 15 cm x 0.6 cm |
| Gewicht | 143 Gramm |
| Format | Softcover |
| ISBN-13 | 9783659126093 |
| Seiten | 84 |