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Routing Congestion in VLSI Circuits

Routing Congestion in VLSI Circuits

von Prashant Saxena, Rupesh S. Shelar und Sachin Sapatnekar
Softcover - 9781441940131
117,69 €
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Beschreibung

This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow. The subjects covered include an explanation of why the problem of congestion is important and how it will trend, plus definitions of metrics that are appropriate for measuring congestion, and descriptions of techniques for estimating and optimizing routing congestion issues in cell-/library-based VLSI circuits.

Estimation and Optimization

Details

Verlag Springer US
Ersterscheinung 29. November 2010
Maße 23.5 cm x 15.5 cm
Gewicht 454 Gramm
Format Softcover
ISBN-13 9781441940131
Auflage Softcover reprint of hardcover 1st ed. 2007
Seiten 250

Schlagwörter

Circuits and Systems, Communications Engineering - Networks, Computer-Aided Design (CAD), Computer-Aided Engineering (CAD - CAE) and Design, Electronic Circuits and Systems, Nachrichtententechnik - Telekommunikation, Schaltkreise und Komponenten (Bauteile)