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Beschreibung
This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates.
Hardware-Efficient Algorithms and FPGA Implementations
Details
| Verlag | Springer Berlin |
| Ersterscheinung | 25. November 2010 |
| Maße | 23.5 cm x 15.5 cm |
| Gewicht | 454 Gramm |
| Format | Softcover |
| ISBN-13 | 9783642094651 |
| Auflage | Softcover reprint of hardcover 1st ed. 2008 |
| Seiten | 139 |