Autorenfreundlich Bücher kaufen?!
Beschreibung
In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.
VLSI Technology
Details
| Verlag | LAP LAMBERT Academic Publishing |
| Ersterscheinung | 24. August 2011 |
| Maße | 22 cm x 15 cm x 0.6 cm |
| Gewicht | 137 Gramm |
| Format | Softcover |
| ISBN-13 | 9783845440842 |
| Seiten | 80 |
Schlagwörter
Bekannt durch
