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Low Power Digital Design using Asynchronous Logic

Low Power Digital Design using Asynchronous Logic

von Sathish Vimalraj Antony Jayasekar
Softcover - 9783846518441
49,00 €
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Beschreibung

The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on obtaining low power by implementing asynchronous logic.

Moving towards clock-less design

Details

Verlag LAP LAMBERT Academic Publishing
Ersterscheinung 10. Oktober 2011
Maße 22 cm x 15 cm x 0.6 cm
Gewicht 155 Gramm
Format Softcover
ISBN-13 9783846518441
Seiten 92

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