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CMOS SRAM Memory Chip Design

CMOS SRAM Memory Chip Design

von Sakshi Rajput
Softcover - 9783659320378
59,00 €
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Beschreibung

Static random-access memory (SRAM) continues to be a critical component across a wide range of microelectronics applications from consumer wireless to high-end workstation and microprocessor applications. For almost all fields of applications, semiconductor memory has been a key enabling technology. It is forecasted that embedded memory in SOC designs will cover up to 90% of the total chip area. A representative example is the use of cache memory in microprocessors. The operational speed could be significantly improved by the application of on-chip cache memory Semiconductor memory arrays capable of storing large quantities of digital information are essential to all digital systems. The ever-increasing demand for larger data storage capacity has driven the fabrication technology and memory development toward more compact design rules and, consequently, toward higher storage densities. This book deals with design of low power static random-access memory cells and peripheral circuits for standalone RAMs, in 350nm focusing on stable operation and reduced leakage current and power dissipation in standby and active modes.

High Speed and Low Power

Details

Verlag LAP LAMBERT Academic Publishing
Ersterscheinung 09. Januar 2013
Maße 22 cm x 15 cm x 0.9 cm
Gewicht 221 Gramm
Format Softcover
ISBN-13 9783659320378
Seiten 136

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