{"product_id":"cost-effective-methods-for-high-speed-nanometer-cmos-vlsi-design-von-charbel-akl","title":"Cost-effective Methods for High-speed Nanometer CMOS VLSI Design","description":"\u003cp\u003eThe semiconductor industry has been following  Moore¿s law over the past five decades due to the  continuous CMOS process technology scaling. This  scaling has led to reduced integrated circuit cost,  higher integration density and better design  performance. On the other hand, many new design  challenges have been introduced due to scaling, and  these chanllenges become more significant when  migrating from one technology node to a newer one  with smaller feature size. This book presents seven  newly developped circuit and interconnect design  methods for nanometer CMOS VLSI designs. The first  four methods target issues in global on-chip  signaling, on-chip busses, and clock signal  distribution. Chapters six and seven of this book  present circuit techniques for low-power high- speed digital circuits and high fan-in logic design.  The last method presented in this book deals with  the mode transition latency and energy overheads in  the power-gated low-power designs.\u003c\/p\u003e\u003cdiv class=\"aw-variant-hidden-subtitle-div\" id=\"aw-variant-subtitle-9783838307329\"\u003e\u003ch3\u003eInterconnect and Circuits\u003c\/h3\u003e\u003c\/div\u003e","brand":"Autorenwelt Shop","offers":[{"title":"Softcover - 9783838307329","offer_id":39497035808861,"sku":"9783838307329","price":59.0,"currency_code":"EUR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0940\/0622\/files\/f7427e66-16b8-47b6-8758-8ad1ea47f63f.jpg?v=1773122134","url":"https:\/\/shop.autorenwelt.de\/products\/cost-effective-methods-for-high-speed-nanometer-cmos-vlsi-design-von-charbel-akl","provider":"Autorenwelt Shop","version":"1.0","type":"link"}